SKL26C Datasheet | Chip Integration Technology

Features - Electrostatic discharge (ESD) test under IEC6100-4-2 standard >16ΚV(SKL22C~SKL26C). standard >10ΚV(SKL210C~SKL220C). - Low profile surface mounted application in order to optimize board space. - Low power loss, high efficiency. - High current capability, low forward voltage drop. - Ultra high-speed switching. - Silicon epitaxial planar chip, metal silicon junction. - Suffix "G" indicates Halogen-free part, ex.SKL22CG. - Lead-free parts meet environmental standards of MIL-STD-19500 /228 - Mechanical data - Epoxy:UL94-V0 rated flame retardant - Case : Molded plastic, DO-214AB / SMC - Terminals : Solder plated, solderable per MIL-STD-750, Method 2026 - Polarity : Indicated by cathode band - Weight : 0.007 ounce, 0.226 gram - Outline SMC(DO-214AB) 0.12 6 (3.20 ) 0.114 (2.90 ) Marking code 0.24 5 (6.22 ) 0.22 0 (5.59 ) 0.114 (2.90 ) 0.07 5 (1.90 ) 0.28 0 (7.11) 0.26 0 (6.60 ) 0.019 (0.4 85) MAX. 0.06 3 (1.60 ) 0.03 0 (0.76 ) 0.32 5 (8.25 ) 0.30 5 (7.75 ) 0.008 (0.2 0) 0.004 (0.1 0) Dimensions in inches and (millimeters) - Maximum ratings and electrical characteristics Rating at 25OC ambient temperature unless otherwise specified. Single phase, half wave, 60Hz, resistive or inductive load. For capacitive load, derate current by 20%. Parameter Forward rectified current Forward surge current Reverse current Diode junction capacitance Thermal resistance Storage temperature Conditions See Fig.1 8.3ms single half sine-wave superimposed on rate load (JEDEC method) VR = VRRM TA = 25OC VR = VRRM TA = 100OC f=1MHz and applied 4V DC reverse voltage Junction to ambient Symbol IO IFSM CJ RθJA...