FEATURES
Two linear-taper digital potentiometers 64 resistor taps per potentiometer End to end resistance 2.5k, 10k, 50k or 100k Potentiometer control and memory access via 2-wire Interface (I2C like) Low wiper resistance, typically 80 Four non-volatile wiper settings for each potentiometer Recall of wiper settings at power up 2.5 to 6.0 volt operation Standby current less than 1µA 1,000,000 nonvolatile WRITE cycles 100 year nonvolatile memory data retention 24-lead SOIC and 24-lead TSSOP Write protection for data register DESCRIPTION
A separate 6-bit control register (WCR) independently controls the wiper tap position for each DP. Associated with each wiper control register are four 6bit non-volatile memory data registers (DR) used for storing up to four wiper settings. Writing to the wiper cont
