CTL0035NS-R3 Datasheet | CT Micro

CTL0035NS-R3 N-Channel Enhancement MOSFET Features - Drain-Source Breakdown Voltage VDSS 50 V - Drain-Source On-Resistance RDS(ON) 1.3Ω, at VGS= 10V, ID= 0.2A RDS(ON) 1.4Ω, at VGS= 5V, ID= 0.2A RDS(ON) 1.6Ω, at VGS= 2.75V, ID= 0.2A ℃- Continuous Drain Current at TA=25 ID = 0.3A - Advanced high cell density Trench Technology - Ro HS pliance & Halogen Free Applications - DC/DC Converter - Load Switch - LCD Display inverter - Power Management Description The CTL0035NS-R3 is the N-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. Package Outline Schematic Drain Drain Gate Source Gate Source CT Micro Proprietary & Confidential Page 1 Rev 2 Jun, 2015 CTL0035NS-R3 N-Channel Enhancement...