NE33200 Overview
The NE33200 is a Hetero-Junction FET chip that utilizes the junction between Si-doped AlGaAs and undoped InGaAs to create a two-dimensional electron gas layer with very high electron mobility. Its excellent low noise figure and high associated gain make it suitable for mercial and industrial applications. NEC's stringent quality assurance and test procedures assure the highest reliability and performance.
NE33200 Key Features
- VERY LOW NOISE FIGURE: 0.75 dB typical at 12 GHz
- HIGH ASSOCIATED GAIN: 10.5 dB Typical at 12 GHz
- GATE LENGTH: 0.3 µm
- GATE WIDTH: 280 µm