CM3132 Datasheet | California Micro Devices

Features - - - Fully integrated power solution for a CPU/SOC core and DDR-I memory ICs Lowest system cost and smallest footprint with just three external output capacitors Three linear regulators for VCORE (1.5A), VDDQ (1.5A), and VTT (0.5A, source-sink) Product Description The CM3132 provides an integrated power solution for a CPU core and DDR-I memory for consumer and other embedded applications. It features three independent linear regulators for VCORE, VDDQ and VTT supply regulation. The default voltage for VCORE is 1.5V. The SENSE_CORE pin can be tied to GND for the default voltage, or through a resistor divider for setting the CPU core in the range 1.2V to 1.8V. VDDQ is internally set to 2.50V and the VTT voltage is always half the VDDQ voltage. A capacitor should be connected to each of the three outputs. There are two enable pins, EN_CORE and EN_DDR. When EN_CORE is set high, the CORE regulator is disabled. When EN_DDR is set high, the two DDR regulators are disabled to minimize overall system power dissipation when memory is in standby mode. These two enable pins allow power sequencing of the DDR and CORE regulator blocks independently. The CM3132 is available in a PSOP-8 package that has excellent thermal dissipation. It is available with optional lead-free finishing. - VDDQ .. - - - - - = 2.5V, VTT = VDDQ/2 ±25m V VCORE is adjustable, with a default output of 1.5V Over-temperature and reverse current protection Overcurrent protection for all regulators PSOP-8 package with integrated heat spreader Lead-free version available Applications - Core CPU and DDR-I memory power for: - Set Top Boxes, DVD Players, Games - Digital TVs, Flat Panel Displays - Printers, Digital Projectors - Embedded systems - munications systems Typical Application Circuit 2.8V to 3.3V Circuit Schematic VCC VREF VDDQ REGULATOR VDDQ VDDQ = 2.5V VCC VDDQ REGULATOR CVCC VREF EN_DDR Enable DDR Memory # EN_DDR CDDQ DDR MEMORY R R CTT VTT REGULATOR VREF=1.25V VTT=1.25V VTT...