FEATURES
n Supports Standard and Fast I2C Protocol n 1.8 V to 5.5 V Supply Voltage Range n 64-Byte Page Write Buffer n Hardware Write Protection for entire memory n Schmitt Triggers and Noise Suppression Filters Device DESCRIPTION
Write operations can be inhibited by taking the WP pin High (this protects the entire memory). External address pins make it possible to address up to eight CAT24C256 devices on the same bus. on I2C Bus Inputs (SCL and SDA). n Low power CMOS technology n 1,000,000 program/erase cycles n 100 year data retention n Industrial temperature range n RoHS-compliant 8-pin PDIP and SOIC packages For Ordering Information details, see page 13. Pin Configuration PDIP (L) SOIC (W, X) A0 A1 A2 VSS 1 2 3 4 8 7 6 5 VCC WP SCL SDA functional symbol VCC SCL A2, A1, A0 WP CAT24C256 SDA For the location of Pin 1, please consult the corresponding package drawing. pin FUNCTIONS A0, A1, A2 SDA SCL WP VCC VSS Device Address Serial Data Serial Clock Write Protect Power Supply Ground VSS * Catalyst carries the I2C protocol under a license from the Philips Corporation. © 2007 by Catalyst Semiconductor, Inc.
Catalyst Semiconductor
