FEATURES
s 400 kHz (5V) and 100 kHz (1.8V) SMBus H GEN FR ALO EE LE A D F R E ETM s Self-timed write cycle with auto-clear s 1,000,000 program/erase cycles s 100 year data retention s 8-pin DIP, 8-pin SOIC and 8-pin TSSOP packages s 256 x 8 memory organization s Hardware write protect compatible s 1.8 to 6.0 volt operation s Low power CMOS technology – zero standby current s 16-byte page write buffer s Industrial, automotive and extended temperature ranges DESCRIPTION
Catalyst’s advanced CMOS technology substantially reduces device power requirements. PIN CONFIGURATION DIP Package (P, L) A0 A1 A2 VSS 1 2 3 4 8 7 6 5 VCC WP SCL SDA A0 A1 A2 VSS BLOCK DIAGRAM SOIC Package (J, W) EXTERNAL LOAD 1 2 3 4 8 7 6 5 VCC WP SCL SDA DOUT ACK VCC VSS WORD ADDRESS BUFFERS SENSE AMPS SHIFT REGISTERS COLUMN DECODERS TSSOP Package (U, Y) A0 A1 A2 VSS 1 2 3 4 8 7 6 5 VCC WP SCL SDA MSOP Package (R, Z) 1 2 3 4 8 7 6 5 WP CONTROL LOGIC SDA START/STOP LOGIC XDEC E2PROM PIN FUNCTIONS Pin Name A0, A1, A2 SDA...
Catalyst Semiconductor
