FEATURES
I 400 kHz I2C bus compatible* I 1.7 to 5.5 volt operation I 16-byte page write buffer I Hardware write protection for entire memory I Permanent and reversible software write H GEN FR ALO EE LE A D F R E ETM I Schmitt trigger on SCL and SDA inputs I Low power CMOS technology I 1,000,000 program/erase cycles I 100 year data retention I 8-pin DIP, SOIC, TSSOP and TDFN packages I Industrial and extended temperature ranges protection for lower 128 bytes DESCRIPTION
Catalyst’s advanced CMOS technology substantially reduces device power requirements. PIN CONFIGURATION DIP Package (P, L) A0 A1 A2 VSS 1 2 3 4 8 7 6 5 VCC WP SCL SDA A0 A1 A2 VSS FUNCTIONAL SYMBOL SOIC Package (J, W) 1 2 3 4 8 7 6 5 VCC WP SCL SDA VCC SCL TDFN Package (SP2, VP2) A0 1 A1 2 A2 3 VSS 4 8 VCC 7 WP 6 SCL 5 SDA A2, A1, A0 WP CAT34RC02 SDA VSS TSSOP Package (U, Y) A0 A1 A2 VSS 1 2 3 4 8 7 6 5 VCC WP SCL SDA PIN FUNCTIONS Pin Name A0, A1, A2 SDA SCL WP VCC VSS Function Device Address Inputs Serial Data/Address S...
Catalyst Semiconductor
