CAT35C804A Datasheet | Catalyst Semiconductor

Preliminary 4K-Bit Secure Access Serial E2PROM Features s Single 5V Supply s Password READ/WRITE Protection: 1 to 8 Bytes s Memory Pointer WRITE Protection s Sequential READ Operation s 256 x16 or 512 x 8 Selectable Serial Memory s UART patible Asynchronous Protocol s 100,000 Program/Erase Cycles s mercial, Industrial and Automotive Temperature Ranges s I/O Speed: 9600 Baud - Clock Frequency: 4.9152 MHz Xtal s Low Power Consumption: - Active: 3 m A - Standby: 250 µA s 100 Year Data Retention DESCRIPTION The CAT35C804A is a 4K-bit Serial E2PROM that safeguards stored data from unauthorized access by use of a user selectable (1 to 8 byte) access code and a movable memory pointer. Two operating modes provide unprotected and password-protected operation allowing the user to configure the device as anything from a ROM to a fully protected no-access memory. The CAT35C804A uses a UART patible asynchronous protocol and has a Sequential Read feature where data can be sequentially clocked out of the memory array. The device is available in 8-pin DIP or 16-pin SOIC packages. PIN CONFIGURATION DIP Package (P) CS CLK DI DO 1 2 3 4 8 7 6 5 VCC PE ERR GND BLOCK DIAGRAM SOIC Package (J) 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 NC NC VCC PE ERR GND NC NC 5074 FHD F01 NC NC CS CLK DI DO NC NC VCC GND 64-BIT ACCESS CODE & CONTROL BLOCK SERIAL MUNICATION BLOCK PIN FUNCTIONS Pin Name CS DO(1) CLK DI(1) PE ERR VCC GND Function Chip Select Serial Data Output Clock Input Serial Data Input Parity Enable Error Indication Pin +5V Power Supply Ground DO CLK PE CS DI 4K-BIT EEPROM ARRAY R/W BUFFER ADDRESS DECODER INSTRUCTION REGISTER ERR INSTRUCTION DECODER ADDRESS REGISTER STATUS REGISTER MEMORY POINTER Note: (1) DI, DO may be tied together to form a mon I/O. 35C804 F02 © 1998 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice Doc. No. 25043-00 2/98 Preliminary...