FEATURES
Four linear taper digitally programmable potentiometers 64 resistor taps per potentiometer End to end resistance 2.5kΩ, 10kΩ, 50kΩ or 100kΩ I²C interface Low wiper resistance, typically 80Ω Four non-volatile wiper settings for each potentiometer Recall of saved wiper settings at power-up 2.5 to 6.0 volt operation Standby current less than 1µA 1,000,000 nonvolatile WRITE cycles 100 year nonvolatile memory data retention 24-lead SOIC and 24-lead TSSOP Write protection for data register For Ordering Information details, see page 15. DESCRIPTION
A separate 6-bit control register (WCR) independently controls the wiper tap position for each DPP. Associated with each wiper control register are four 6-bit non-volatile memory data registers (DR) used for storing up to four wiper settings. Writing to the wiper control register or any of the non-volatile data registers is via a I²C serial bus. On power-up, the contents of the first data register (DR0) for each o...
Catalyst Semiconductor
