FEATURES
s Two linear-taper digitally programmable H GEN FR ALO EE LE A D F R E ETM s Automatic recall of saved wiper settings at potentiometers s 64 resistor taps per potentiometer s End to end resistance 2.5kΩ, 10kΩ, 50kΩ or 100kΩ s Potentiometer control and memory access via power up s 2.5 to 6.0 volt operation s Standby current less than 1µA s 1,000,000 nonvolatile WRITE cycles s 100 year nonvolatile memory data retention s 24-lead SOIC, 24-lead TSSOP, and BGA s Industrial temperature ranges SPI interface: Mode (0, 0) and (1, 1) s Low wiper resistance, typically 80Ω s Nonvolatile memory storage for up to four wiper settings for each potentiometer DESCRIPTION
A separate 6-bit control register (WCR) independently controls the wiper tap switches for each DPP. Associated with each wiper control register are four 6-bit non-volatile memory data registers (DR) used for storing up to four wiper settings. Writing to the wiper control register or any of the non-volatile data registers is via a SPI serial bus.
Catalyst Semiconductor
