CAT9883C Datasheet | Chip Advanced Technology

150MSPS Triple 8-bit Video Analog-to-Digital Data Converter Free Datasheet http://.. Features 0.5 V to 1.0 V Analog Input Range Ultra Wide Range Conversion Rate (480i~1080P) Adjustable Analog Input Bandwidth 4:2:2 Output Format Mode Digital Output Tri-State 3.3 V Power Supply Full Sync Processing Midscale Clamping Power-Down Mode Max. Power Dissipation under 800m W @ SXGA (1280x1024x75Hz) Automatic Offset Calibration Automatic Gain Balance Built-In Analog AGC (i GOTM) Built-In smart de-macrovision Green Package (Optional) HSYNC COAST CLAMP FILT SCL SDA A0 SYNC PROCESSING & CLOCK GENERATION BAIN CLAMP adjustment for the sake of color balancing. The CAT9883C also offers full sync processing for posite sync and sync-on-green applications. Clamp and COAST signals are generated internally or may be provided by the user through Clamp and COAST pin. The CAT9883C is fabricated in 0.35um mixed-mode CMOS process and available in 80-lead LQFP package. 8 RAIN CLAMP A/D OFFSET GAIN CONTROL RED[7:0] 8 GREEN[7:0] GAIN CLAMP A/D OFFSET GAIN CONTROL 8 BLUE[7:0] A/D OFFSET GAIN CONTROL MIDSCV DTACK HSOUT VSOUT SOGOUT REF BYPASS Applications RGB/YUV Signal Conversion Processing LCD Monitors and TV Projectors Rear Projection TV Plasma Display Panels Digital TV Set-Top Box SERIAL REGISTER & POWER MANAGEMENT Figure 1. CAT9883C Functional Block Diagram GENERAL DESCRIPTION A top-notch video analog front-end, the CAT9883C converts RGB or YUV triple analog video inputs into 8-bit digital outputs. Specifically, it works to convert analog inputs to digital outputs at up to 8 bits/150MSPS, which means it supports 1080P video format out of the box. The CAT9883C integrates three ADCs with programmable gain control, PLL, clamp control and offset cancellation. The robust PLL design, which delivers high precision and low jitter, generates pixel clocks from 12MHz to 150MHz. It also supports full sync processing for posite sync and...