CX51191 - (CX5000 Series) Structured ASIC

The 0.18um CX5000 is an ASIC that utilizes the combination of an advanced metal programmable gate array and optimized EDA system to implement high performance ASIC designs while reducing application tooling costs and design turnaround time.

• Structured ASIC architecture Low NRE and start-up costs Fast time to production 30K to 1.2M usable ASIC gates Up to 2.6M bits of fast block memory w w w a D . S a t 2ns access time single-port SRAM, dual-port SRAM and ROM e e h U 4 t m o . c Low power consumption (0.06uW/MHz/Gate) 200MHz general core logic operation, 650MHz in constrained clock domains 1 CEC034 (9/20/05) © ChipX Inc. www. DataSheet4U. com C.