CH7517 Datasheet | Chrontel

Chrontel CH7517 Display Port to VGA Converter Brief Datasheet Features GENERAL DESCRIPTION - - - pliant with Display Port specification version 1.2 and Embedded Display Port (e DP) specification version 1.3. Support 2 Main Link Lanes at either 1.62Gb/s or 2.7Gb/s link rate Support analog RGB output for VGA with Triple 9-bit DAC up to 200MHz pixel rate. Sync signals can be provided in separated or posite manner. Support VESA and CEA timing standards u up to 1920x1200@ 60Hz or 2048x1152@60Hz with reduced blanking Chrontel’s CH7517 is a low-cost, low-power semiconductor device that translates the Display Port signal to the VGA. This innovative Display Port receiver with an integrated VGA encoder is specially designed to target the notebook/ultrabook, tablet device and PC market segments. Through the CH7517’s advanced decoding / encoding algorithm, the input Display Port high-speed serialized multimedia data can be seamlessly converted to analog RGB video output. - VGA output is pliant with VESA VSIS v1r2 specification - Embedded MCU to handle the control logic - Support device boot up by automatically loading The CH7517 is pliant with the Display Port specification version 1.2 and the Embedded Display Port - - - - - firmware from on-chip flash Boot ROM Integrated EDID Buffer, and MCCS bypass supported Specification version 1.3. In the device’s receiver block, which supports two Display Port Main Link Lanes input Supports Enhanced Framing Mode with data rate running at either 1.62Gb/s or 2.7Gb/s, can Fast and full Link Training for embedded Display Port accept RGB digital formats in either 18-bit 6:6:6 or 24-bit system 8:8:8, and converted the input signal to VGA output up to Support e DP Authentication: Alternative Scramble Seed Reset and Alternative Framing 2 work modes: connect 27MHz crystal, inject 27MHz clock 1920x1200@ 60Hz or 2048x1152@60Hz with reduced blanking. Leveraging the Display Port’s unique source/sink “Link Training”...