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CS2100-CP Datasheet Fractional-n Clock Multiplier

Manufacturer: Cirrus Logic

Overview: www.DataSheet4U.com CS2100-CP Fractional-N Clock Multiplier General.

General Description

The CS2100-CP is an extremely versatile system clocking device that utilizes a programmable phase lock loop.

The CS2100-CP is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital PLL.

This architecture allows for generation of a low-jitter clock relative to an external noisy synchronization clock at frequencies as low as 50 Hz.

Key Features

  •  Clock Multiplier / Jitter Reduction      Generates a Low Jitter 6 - 75 MHz Clock from a Jittery or Intermittent 50 Hz to 30 MHz Clock Source Highly Accurate PLL Multiplication Factor.
  • Maximum Error Less Than 1 PPM in HighResolution Mode ® I²C / SPI™ Control Port Configurable Auxiliary Output Flexible Sourcing of Reference Clock.
  • External Oscillator or Clock Source.
  • Supports Inexpensive Local Crystal Minimal Board Space Required.
  • No External Analog L.

More Datasheets from Cirrus Logic

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CS2100-CP Distributor