Datasheet Summary
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CS48500 Data Sheet
Features
Cost-effective, High-performance 32-bit DSP
300,000,000 MAC/S (multiply accumulates per second) Dual MAC cycles per clock 72-bit accumulators are the most accurate in the industry 24k x 32 SRAM, 2k blocks
- assignable to data or program Internal ROM contains a variety of configurable sound enhancement feature sets
- 8-channel internal DMA
- Internal watch-dog DSP lock-up prevention
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- Differentiating from the legacy Cirrus multi-standard, multichannel decoders, this new CS48500 family is still based on the same high-performance 32-bit fixed point DSP Digital Signal Processor core but instead is equipped with much less memory,...