CS53L30 Datasheet | Cirrus Logic

Features System Features - 91-d B dynamic range (A-weighted) @ 0-d B gain - - 84-d B THD+N @ 0-d B gain - Four fully differential inputs: Four analog mic/line inputs - Four analog programmable gain amplifiers - - 6 to +12 d B, in 0.5-d B steps - +10 or +20 d B boost for mic input - Four mic bias generators - MUTE pin for quick mic mute and programmable quick power down Digital Processing Features - Volume control, mute, programmable high-pass filter, noise gate - Two digital mic (DMIC) interfaces Digital Output Features - Two DMIC SCLK generators - Four-channel I2S output or TDM output. Four CS53L30s can be used to output 16 channels of 24-bit 16-k Hz sample rate data on a single TDM line. - Native (no PLL required) support for 6-/12-MHz, 6.144-/ 12.288-MHz, 5.6448-/11.2896-MHz, or 19.2-MHz master clock rates and 8- to 48-k Hz audio sample rates - Master or Slave Mode. Clock dividers can be used to generate mon audio clocks from single-master clock input. - Low power consumption - Less than 4.5-m W stereo (16 k Hz) analog mic record - Less than 2.5-m W mono (8 k Hz) analog mic record - Selectable mic bias and digital interface logic voltages - High-speed (400-k Hz) I²C control port - Available in 30-ball WLCSP and 32-pin QFN Applications - Voice-recognition systems - Advanced headsets and telephony systems - Voice recorders - Digital cameras and video cameras IN1+/DMIC1_SD IN1- IN2+ IN2- IN3+/DMIC2_SD IN3- IN4+ IN4- MIC 1_BIAS MIC 2_BIAS MIC 3_BIAS MIC 4_BIAS VA LDO VD + - + - +10 or +20 d B + ADC1A - + ADC1B - - 6 to +12 d B, 0.5 d B steps MCLK_INT Decimators...