Datasheet4U Logo Datasheet4U.com

CS5531 - 16-BIT AND 24-BIT ADC

Datasheet Summary

Description

The CS5531/32/33/34 are highly integrated ∆Σ Analogto-Digital Converters (ADCs) which use charge-balance techniques to achieve 16-bit (CS5531/33) and 24-bit (CS5532/34) performance.

Features

  • Chopper Stabilized PGIA (Programmable Gain Instrumentation Amplifier, 1x to 64x) 6 nV/√Hz @ 0.1 Hz (No 1/f noise) at 64x 500 pA Input Current with Gains >1 Delta-Sigma Analog-to-Digital Converter Linearity Error: 0.0007% FS Noise Free Resolution: Up to 23 bits Two or Four Channel Differential MUX Scalable Input Span via Calibration ±5 mV to differential ±2.5V Scalable VREF Input: Up to Analog Supply Simple three-wire serial interface SPI®and Microwire™ Compatible Schmitt Trigger on Serial Clock.

📥 Download Datasheet

Datasheet preview – CS5531

Datasheet Details

Part number CS5531
Manufacturer Cirrus Logic
File Size 566.30 KB
Description 16-BIT AND 24-BIT ADC
Datasheet download datasheet CS5531 Datasheet
Additional preview pages of the CS5531 datasheet.
Other Datasheets by Cirrus Logic

Full PDF Text Transcription

Click to expand full text
CS5531/32/33/34 16-Bit and 24-Bit ADCs with Ultra Low Noise PGIA Features Chopper Stabilized PGIA (Programmable Gain Instrumentation Amplifier, 1x to 64x) 6 nV/√Hz @ 0.1 Hz (No 1/f noise) at 64x 500 pA Input Current with Gains >1 Delta-Sigma Analog-to-Digital Converter Linearity Error: 0.0007% FS Noise Free Resolution: Up to 23 bits Two or Four Channel Differential MUX Scalable Input Span via Calibration ±5 mV to differential ±2.5V Scalable VREF Input: Up to Analog Supply Simple three-wire serial interface SPI®and Microwire™ Compatible Schmitt Trigger on Serial Clock (SCLK) R/W Calibration Registers Per Channel Selectable Word Rates: 6.25 to 3,840 Sps Selectable 50 or 60 Hz Rejection Power Supply Configurations VA+ = +5 V; VA- = 0 V; VD+ = +3 V to +5 V VA+ = +2.5 V; VA- = -2.
Published: |