CS5581 Datasheet | Cirrus Logic

Features & Description ‰ Single-ended Analog Input ‰ On-chip Buffers for High Input Impedance ‰ Conversion Time = 5 µS ‰ Settles in One Conversion .. General Description The CS5581 is a single-channel, 16-bit analog-to-digital converter capable of 200 k Sps conversion rate. The input accepts a single-ended analog input signal. On-chip buffers provide high input impedance for both the AIN input and the VREF+ input. This significantly reduces the drive requirements of signal sources and reduces errors due to source impedances. The CS5581 is a delta-sigma converter capable of switching multiple input channels at a high rate with no loss in throughput. The ADC uses a low-latency digital filter architecture. The filter is designed for fast settling and settles to full accuracy in one conversion. The converter's 16-bit data output is in serial format, with the serial port acting as either a master or a slave. The converter is designed to support bipolar, ground-referenced signals when operated from ±2.5V analog supplies. The CS5581 uses self-calibration to achieve low offset and gain errors. The converter achieves a S/N of 81 d B. Linearity is 0.0007% of full scale. The converter can operate from an analog supply of 0-5V or from ±2.5V. The digital interface supports standard logic operating from 1.8, 2.5, or 3.3 V. ORDERING INFORMATION: See Ordering Information on page 31. ‰ Linearity Error = 0.0007% ‰ Signal-to-Noise = 81 d B ‰ S/(N + D) = 81 d B ‰ DNL = ±0.1 LSB Max. ‰ Self-calibration: - Maintains accuracy over time & temperature. ‰ Simple three/four-wire serial interface ‰ Power Supply Configurations: - Analog: +5V/GND; IO: +1.8V to +3.3V - Analog: ±2.5V; IO: +1.8V to +3.3V ‰ Power Consumption: - ADC Input Buffers On: 85 m W - ADC Input Buffers Off: 60 m W V1+ V2+ VREF+ VREFDIGITAL FILTER LOGIC SERIAL INTERFACE SMODE CS ADC AIN A SCLK SDO RDY BUFEN OSC/CLOCK GENERATOR CALIBRATION MICROCONTROLLER RST CONV CAL BP/UP MCLK V1- V2- VLR2 Adv...