EP7311 Overview
The core-logic functionality of the device is built around an ARM720T processor with 8 KB of four-way set-associative unified cache and a write buffer. Incorporated into the ARM720T is an enhanced memory management unit (MMU) which allows for support.
EP7311 Key Features
- ARM720T Processor
- ARM7TDMI CPU
- 8 KB of four-way set-associative cache
- MMU with 64-entry TLB
- Thumb code support enabled
- Ultra low power
- 90 mW at 74 MHz typical
- 30 mW at 18 MHz typical
- 10 mW in the Idle State
- <1 mW in the Standby State