Description
These N-Channel enhancement mode power field effect transistors are produced using advanced technology which has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode.
Features
- TO252 / TO251 Pin Configuration
Low gate charge (typical 27 nC) Low Crss ( typical 17 pF) Fast switching 100%avalanche tested Improved dv/dt capability
D
G S TO252
G D S TO251
(CMD5N50)
(CMU5N50)
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
Parameter
VDSS
Drain-Source Voltage
ID Drain Current - Continuous (TC = 25°C)
- Continuous (TC = 100°C)
IDM Drain Current - Pulsed
(Note 1)
VGSS
Gate-Source Voltage
EAS Single Pulsed Avalanche Energy
(Note 2)
IAR Avala.
CMD5N50 Datasheet
