RS8953
Features
- Supports All HDSL Bit Rates
- 2 pair T1 standard (784 kbps)
- 2 pair E1 standard (1168 kbps)
- 3 pair E1 standard (784 kbps)
- 1/2/3 pair custom (Nx64 kbps, N=2-36)
- T1/E1 Primary Rate (PCM) Channel
- Connects to Conexant E1/T1 Framers
- Framed or unframed mode
- Sync/Async payload mapping
- Clock recovery/jitter attenuation
- PRBS/fixed test patterns
- BER measurement
- HDSL Channels
- Connects to Conexant Zip Wire Transceivers
- Three independent serial channels
- Central, remote, or repeater
- Overhead (HOH) management
- Programmable path delays
- Error performance monitoring
- Software controlled EOC and IND
- Auxiliary payload/Z-bit data link
- Master loop ID and interchange
- Auto tip/ring reversal
- Programmable Data Routing
- PCM timeslots
- HDSL payload
- Drop/Insert
- HDSL payload
- Auxiliary
- HDSL payload
- PRBS/Fixed
- PCM or HDSL
- PCM and HDSL loopbacks
- Intel® or Motorola® MPU interface
- CMOS technology, 3.3 V operation
- 68-pin PLCC or 80-pin...
