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SCG2540 Datasheet PDF

Connor-Winfield SCG2540

The SCG2540 is a mixed-signal phase lock loop generating CMOS outputs from an intrinsically low jitter voltage controlled crystal oscillator. The SCG2540 can lock to one of two possible input reference frequencies at 10 kHz which is selectable using one input select pin. If both references are lost, the SCG2540 will enter a Free Run state which will guarantee a 20 ppm accurate output.
Part No. SCG2540
Datasheet SCG2540 Download
Manufacturer
Connor-Winfield
Description Synchronous Clock Generators
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SCG2540 datasheet page 1 preview

GENERAL DESCRIPTION

Further features include an alarm output to indicate Loss of Reference, LOR, or Loss of Lock, LOL. If only one of the references is lost, the unit will disable its phase detector and will signal an alarm, but will not switch reference automatically. Additionally, the Free Run mode may be entered manually by applying a high signal to the Force Free Run pin. If the unit is in Free Run mode, the Free Run status pin will be high. All outputs, except the Oscillator Output, may be put into the tri-state high impedance condition for external testing purposes by applying a high signal to the Reset/ Tri-State pin. The filtered 10 kHz is derived from the oscillator output. The offset between the filtered output and the reference input will change with each reference rearrangement. The package maximum dimensions are .780” x .830” x .35” on a six layer FR4 board with surface mount pins. Parts are assembled using high temperature solder to withstand surface mount reflow process.
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