Connor-Winfield SCG4010
The SCG4000 Series provides a jitter filtered, wander following output signal sychronized to a superior Stratum or peer input reference signal. The LVPECL outputs may be disabled. The jitter attenuated internal reference, divided down from the output frequency, is also output to a pin.| Part No. | SCG4010 |
|---|---|
| Datasheet | SCG4010 Download |
| Manufacturer |  Connor-Winfield |
| Description | Synchronous Clock Generators |
| Buy | Stock & Price |
FEATURES
● 3.3V High Precision PLL● Tri-State Capability
● Active Alarms
● Guaranteed Free Run ±20ppm
● 1 sec. Acquisition Time
GENERAL DESCRIPTION
The SCG4000 Series is a digital phase locked loop generating a LVPECL outputs from an intrinsically low jitter voltage controlled crystal oscillator. The LVPECL outputs may be disabled. The SCG4000 Series can lock to one of four possible reference frequencies from 8 to 64 KHz, which is selectable using two input select pins. A filtered reference output signal is available at the same frequency. The unit has an acquisition time of about 1 second and it is tolerant of different reference duty cycles. Functional Block Diagram Figure 1 Further features include alarm outputs for Loss-ofReference (LOR) and Loss-of-Lock (LOL). During the LOR alarm, the SCG400 will also enter a Free Run state, which will guarantee a 20 ppm accurate output. Additionally the Free Run mode may be entered manually. The alarms and reference output may be put into the tri-state high impedance condition for external testing purposes.
