SCG4500 - Synchronous Clock Generators

The SCG4500 Series is a mixed-signal phase locked loop generating LVPECL outputs from an intrinsically low jitter, voltage controlled, crystal oscillator.

The LVPECL outputs may be disabled.

• model from the base model (SCG4500) are highlighted in boldface color and in the notes column. Preliminary Data Sheet #: SG026 Page 2 of 16 Rev: P08 Date: 10/08/02 © Copyright 2002 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Absolute Maximum Rating Table 1 Symbol Vcc Vi Ts Parameter Power Supply Voltage Input Voltage Storage Temperature All SCG4500 Models Minimum -0.5 -0.5 -65.0 Nominal Maximum +4.0 +5.5 +100 Units Volts Volts °C Notes 1.