Datasheet Summary
High Frequency Programmable PECL Clock Generator
Features
- Jitter peak-peak (Typical) = 35 ps
- LVPECL output
- Default Select option
- Serially configurable multiply ratios
- Output edge rate control
- 16-pin TSSOP
- High frequency
- 3.3 V operation
Logic Block Diagram
XIN XOUT
OE S
SER CLK SER DATA
Xtal Oscillator
High Frequency Programmable PECL Clock Generator
Benefits
- High accuracy clock generation
- One pair of differential output drivers
- Phase-locked loop (PLL) multiplier select
- 8-bit feedback counter and 6-bit reference counter for high accuracy
- Minimize electromagnetic interference (EMI)
- Industry standard, low cost package saves on board space For a plete...