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CY25822-2 - CK-SSC Spread Spectrum Clock Generator

General Description

Pin No.

1 2 3 4 5 6 7 8 Pin Name CLKIN VDD GND CLKOUT REFOUT SDATA SCLOCK PWRDWN# Pin Type Input Power Ground Output Output I/O Input Output Pin Description 48-MHz or 66-MHz Clock Input.

Power Supply for PLL and Outputs.

Key Features

  • 3.3V operation 48- and 66-MHz frequency support Selectable slew rate control 350-pS jitter I2C programmability 500-µA power-down current Spread Spectrum for best electromagnetic interference (EMI) reduction.
  • 8-pin SOIC package Block Diagram VDD REFOUT CLKOUT (SSCG Output) Clock Input Freq. Divider M Phase Detector Charge Pump Σ VCO Post Dividers SDATA SCLOCK PWRDWN# Logic Control Feedback Divider N Modulati.

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www.DataSheet4U.com CY25822-2 CK-SSC Spread Spectrum Clock Generator Features • • • • • • • 3.3V operation 48- and 66-MHz frequency support Selectable slew rate control 350-pS jitter I2C programmability 500-µA power-down current Spread Spectrum for best electromagnetic interference (EMI) reduction • 8-pin SOIC package Block Diagram VDD REFOUT CLKOUT (SSCG Output) Clock Input Freq. Divider M Phase Detector Charge Pump Σ VCO Post Dividers SDATA SCLOCK PWRDWN# Logic Control Feedback Divider N Modulating Waveform PLL GND Pin Configuration C L K IN 1 VDD 2 8 *P W R D W N # 7 SC LO C K C Y 2 5 8 2 2 -2 GND 3 C LKO U T 4 * 1 5 0 K Ω P u ll-u p 6 SDATA 5 REFOUT Cypress Semiconductor Corporation Document #: 38-07531 Rev.