CY28358 - 200-MHz Differential Clock Buffer/Driver

Product Overview

Cypress Semiconductor

Datasheet Details

Part number	CY28358
Manufacturer	Cypress Semiconductor
File Size	72.75 KB
Description	200-MHz Differential Clock Buffer/Driver
Datasheet	CY28358 Datasheet
Additional preview pages of the CY28358 datasheet.

Product details

Description

This PLL clock buffer is designed for 2.5 VDD and 2.5 AVDD operation and differential output levels.

This device is a zero delay buffer that distributes a clock input CLKIN to six differential pairs of clock outputs (CLKT[0:5], CLKC[0:5]) and one feedback clock output FBOUT.

Features

Up to 200 MHz operation.
Phase-locked loop clock distribution for Double Data Rate Synchronous DRAM.

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Other Datasheets by Cypress Semiconductor

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Published: Aug 31, 2014 |