Datasheet Details
| Part number | CY28442 |
|---|---|
| Manufacturer | Cypress Semiconductor |
| File Size | 319.63 KB |
| Description | Clock Generator |
| Datasheet |
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I/O, PU 3.3V LVTTL input for enabling assigned SRC clock (active low) or 100 MHz Serial Reference Clock.
Selectable through CLKREQA# defaults to enable/disable SRCT/C4, CLKREQB# defaults to enable/disable SRCT/C5.
Assignment can be changed via SMBUS register Byte 8.
| Part number | CY28442 |
|---|---|
| Manufacturer | Cypress Semiconductor |
| File Size | 319.63 KB |
| Description | Clock Generator |
| Datasheet |
|
|
|
|