Datasheet4U Logo Datasheet4U.com

CY2XP24 - Crystal to LVPECL Clock Generator

Description

The CY2XP24 is a PLL (phase locked loop) based high performance clock generator.

It is optimized to generate 10 Gb Ethernet, Fibre Channel, and other high performance clock frequencies.

It produces an output frequency that is either 6.25 times or 7.5 times the crystal frequency.

Features

  • Functional.

📥 Download Datasheet

Other Datasheets by Cypress Semiconductor

Full PDF Text Transcription

Click to expand full text
CY2XP24 Crystal to LVPECL Clock Generator Features ■ ■ ■ ■ ■ ■ ■ Functional Description The CY2XP24 is a PLL (phase locked loop) based high performance clock generator. It is optimized to generate 10 Gb Ethernet, Fibre Channel, and other high performance clock frequencies. It produces an output frequency that is either 6.25 times or 7.5 times the crystal frequency. It uses Cypress’s low noise VCO technology to achieve low phase jitter, that meets both 10 Gb Ethernet, Fibre Channel, and SATA jitter requirements. The CY2XP24 has a crystal oscillator interface input and one LVPECL output pair. One LVPECL Output Pair Selectable output frequency: 156.25 MHz or 187.5 MHz External crystal frequency: 25 MHz Low root mean square (RMS) phase jitter at 156.25 MHz, using 25 MHz crystal (1.
Published: |