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CY62128V18 - 128K x 8 Static RAM

Download the CY62128V18 datasheet PDF. This datasheet also covers the CY6 variant, as both devices belong to the same 128k x 8 static ram family and are provided as variant models within a single manufacturer datasheet.

General Description

The CY62128V family is composed of three high-performance CMOS static RAMs organized as 131,072 words by 8 bits.

Key Features

  • Low voltage range:.
  • 2.7V.
  • 3.6V (CY62128V).
  • 2.3V.
  • 2.7V (CY62128V25).
  • 1.6V.
  • 2.0V (CY62128V18) Low active power and standby power Easy memory expansion with CE and OE features TTL-compatible inputs and outputs Automatic power-down when deselected CMOS for optimum speed/power LOW Output Enable (OE) and three-state drivers. These devices have an automatic power-down feature, reducing the power.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CY6-2128V.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription for CY62128V18 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for CY62128V18. For precise diagrams, and layout, please refer to the original PDF.

amily CY62128V Family 128K x 8 Static RAM Features • Low voltage range: — 2.7V–3.6V (CY62128V) — 2.3V–2.7V (CY62128V25) • • • • • — 1.6V–2.0V (CY62128V18) Low active powe...

View more extracted text
V–2.7V (CY62128V25) • • • • • — 1.6V–2.0V (CY62128V18) Low active power and standby power Easy memory expansion with CE and OE features TTL-compatible inputs and outputs Automatic power-down when deselected CMOS for optimum speed/power LOW Output Enable (OE) and three-state drivers. These devices have an automatic power-down feature, reducing the power consumption by over 99% when deselected. The CY62128V family is available in the standard 450-mil-wide SOIC, 32-lead TSOP-I, and STSOP packages. Writing to the device is accomplished by taking Chip Enable one (CE1) and Write Enable (WE) inputs LOW and the Chip Enable two (CE