CY62167EV30 Datasheet | Cypress

CY62167EV30 Mo BL® 16-Mbit (1M x 16 / 2M x 8) Static RAM Features - - - - TSOP I package configurable as 1M x 16 or as 2M x 8 SRAM Very high speed: 45 ns Wide voltage range: 2.20V- 3.60V Ultra low standby power - Typical standby current: 1.5 µA .. - Maximum standby current: 12 µA - Ultra low active power - - - - - Typical active current: 2.2 m A @ f = 1 MHz Easy memory expansion with CE1, CE2, and OE Features Automatic power down when deselected CMOS for optimum speed/power Offered in Pb-free 48-ball BGA and 48-pin TSOP I packages significantly reduces power consumption by 99% when addresses are not toggling. Place the device into standby mode when deselected (CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH). The input and output pins (IO0 through IO15) are placed in a high-impedance state when: the device is deselected (CE1 HIGH or CE2 LOW), outputs are disabled (OE HIGH), both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH), or a write operation is in progress (CE1 LOW, CE2 HIGH and WE LOW). To write to the device, take Chip Enables (CE1 LOW and CE2 HIGH) and Write Enable (WE) input LOW. If Byte Low Enable (BLE) is LOW, then data from IO pins (IO0 through IO7) is written into the location specified on the address pins (A0 through A19). If Byte High Enable (BHE) is LOW, then data from the IO pins (IO8 through IO15) is written into the location specified on the address pins (A0 through A19). To read from the device, take Chip Enables (CE1 LOW and CE2 HIGH) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on IO0 to IO7. If Byte High Enable (BHE) is LOW, then data from memory will appear on IO8 to IO15. See the “Truth Table” on page 10 for a plete description of read and write modes. Functional Description[1] The CY62167EV30 is a high performance CMOS static RAM organized as 1M words by 16 bits / 2M...