Part CY7B9920
Description Low Skew Clock Buffer
Manufacturer Cypress
Size 162.89 KB
Cypress
CY7B9920

Overview

  • All outputs skew <100 ps typical (250 max.) 15- to 80-MHz output operation Zero input to output delay 50% duty-cycle outputs Outputs drive 50Ω terminated lines Low operating current 24-pin SOIC package Jitter: <200 ps peak to peak, <25 ps RMS Compatible with Pentiumâ„¢-based processors