CY7C006AV Datasheet | Cypress

CY7C138AV CY7C139AV CY7C144AV CY7C145AV CY7C006AV CY7C016AV CY7C007AV CY7C017AV 3.3 V 8 K / 16 K × 8 Asynchronous Dual-Port Static RAM CY7C144AV CY7C006AV 3.3 V 8 K / 16 K × 8 Asynchronous Dual-Port Static RAM 3.3 V 8 K / 16 K × 8 Dual-Port Static RAM Features - True dual-ported memory cells which allow simultaneous access of the same memory location - 8 K / 16 K × 8 organizations (CY7C144AV/CY7C006AV) - 0.35-micron plementary metal oxide semiconductor (CMOS) for optimum speed/power - High-speed access: 25 ns - Low operating power - Active: ICC = 115 m A (typical) - Standby: ISB3 = 10 A (typical) - Fully asynchronous operation - Automatic power-down Logic Block Diagram R/WL - Expandable data bus to 16 bits or more using Master/ Slave chip select when using more than one device - On-chip arbitration logic - Semaphores included to permit software handshaking between ports - INT flag for port-to-port munication - Pin select for Master...