CY7C1011DV33 Description
The CY7C1011DV33[1] is a high-performance CMOS Static RAM organized as 128 K words by 16 bits. Writing to the device is acplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A16).
CY7C1011DV33 Key Features
- Pin-and function-patible with CY7C1011CV33
- High speed
- tAA = 10 ns
- Low active power
- ICC = 90 mA @ 10 ns (Industrial)
- Low CMOS standby power
- ISB2 = 10 mA
- Data Retention at 2.0 V
- Automatic power-down when deselected
- Independent control of upper and lower bits