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CY7C1062DV33 - 16 Mbit (512K x 32) Static RAM

General Description

The CY7C1062DV33 is a high performance CMOS Static RAM organized as 524,288 words by 32 bits.

To write to the device, take Chip Enables (CE1, CE2, and CE3 LOW) and Write Enable (WE) input LOW.

Key Features

  • High speed.
  • tAA = 10 ns.
  • Low active power.
  • ICC = 175 mA at 10 ns.
  • Low complementary metal oxide semiconductor (CMOS) standby power.
  • ISB2 = 25 mA.
  • Operating voltages of 3.3 ± 0.3 V.
  • 2.0 V data retention.
  • Automatic power down when deselected.
  • Transistor-transistor logic (TTL) compatible inputs and outputs.
  • Easy memory expansion with CE1, CE2, and CE3 features.
  • Available in Pb-free 119-ball plastic ball grid array (PBGA) package Logic Bl.

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Other Datasheets by Cypress (now Infineon)

Part Number Description
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CY7C1062DV33 16 Mbit (512 K × 32) Static RAM Features ■ High speed ❐ tAA = 10 ns ■ Low active power ❐ ICC = 175 mA at 10 ns ■ Low complementary metal oxide semiconductor (CMOS) standby power ❐ ISB2 = 25 mA ■ Operating voltages of 3.3 ± 0.3 V ■ 2.0 V data retention ■ Automatic power down when deselected ■ Transistor-transistor logic (TTL) compatible inputs and outputs ■ Easy memory expansion with CE1, CE2, and CE3 features ■ Available in Pb-free 119-ball plastic ball grid array (PBGA) package Logic Block Diagram INPUT BUFFERS A(9:0) 512K x 32 ARRAY Functional Description The CY7C1062DV33 is a high performance CMOS Static RAM organized as 524,288 words by 32 bits. To write to the device, take Chip Enables (CE1, CE2, and CE3 LOW) and Write Enable (WE) input LOW.