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CY7C1318BV18 Datasheet 18-Mbit DDR-II SRAM 2-Word Burst Architecture

Manufacturer: Cypress (now Infineon)

Download the CY7C1318BV18 datasheet PDF. This datasheet also includes the CY7C1316BV18 variant, as both parts are published together in a single manufacturer document.

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Note: The manufacturer provides a single datasheet file (CY7C1316BV18_CypressSemiconductor.pdf) that lists specifications for multiple related part numbers.

General Description

The CY7C1316BV18, CY7C1916BV18, CY7C1318BV18, and CY7C1320BV18 are 1.8V Synchronous Pipelined SRAM equipped with DDR-II architecture.

The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter.

Addresses for Read and Write are latched on alternate rising edges of the input (K) clock.

Overview

CY7C1316BV18 CY7C1916BV18 CY7C1318BV18 CY7C1320BV18 18-Mbit DDR-II SRAM 2-Word Burst.

Key Features

  • 18-Mbit density (2M x 8, 2M x 9, 1M x 18, 512K x 36).
  • 300-MHz clock for high bandwidth.
  • 2-Word burst for reducing address bus frequency.
  • Double Data Rate (DDR) interfaces (data transferred at 600 MHz) @ 300 MHz.
  • Two input clocks (K and K) for precise DDR timing.
  • SRAM uses rising edges only.
  • Two input clocks for output data (C and C) to minimize clock-skew and flight-time mismatches.
  • Echo clocks (CQ and CQ) simplify data cap.

More Datasheets from Cypress (now Infineon)

Part Number Description
CY7C1318AV18 18-Mbit DDR-II SRAM 2-Word Burst Architecture
CY7C1318CV18 (CY7C1xxxCV18) 18-Mbit DDR-II SRAM 2-Word Burst Architecture
CY7C1318JV18 18-Mbit DDR-II SRAM 2-Word Burst Architecture
CY7C1318KV18 18-Mbit DDR II SRAM Two-Word Burst Architecture
CY7C131 1K x 8 Dual-Port Static RAM
CY7C1310BV18 1.8V Synchronous Pipelined SRAM
CY7C1311AV18 (CY7C131xAV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture
CY7C1311BV18 (CY7C1x1xBV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture
CY7C1311CV18 (CY7C1x1xCV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture
CY7C1311JV18 (CY7C1x1xJV18) 18-Mbit QDR II SRAM 4-Word Burst Architecture