CY7C1318KV18 Datasheet 18-Mbit DDR II SRAM Two-Word Burst Architecture

Manufacturer: Cypress (now Infineon)

Download the CY7C1318KV18 datasheet PDF. This datasheet also includes the CY7C1316KV18 variant, as both parts are published together in a single manufacturer document.

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CY7C1318KV18 18-mbit ddr ii sram two-word burst architecture by Cypress (now Infineon) - Datasheet Preview — Note: The manufacturer provides a single datasheet file (CY7C1316KV18_CypressSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number	CY7C1318KV18
Manufacturer	Cypress (now Infineon)
File Size	1.45 MB
Description	18-Mbit DDR II SRAM Two-Word Burst Architecture
Datasheet	CY7C1318KV18 Datasheet

General Description

The CY7C1316KV18, CY7C1916KV18, CY7C1318KV18, and CY7C1320KV18 are 1.8 V synchronous pipelined SRAM equipped with DDR II architecture.

The DDR II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter.

Addresses for read and write are latched on alternate rising edges of the input (K) clock.

Overview

 CY7C1316KV18, CY7C1916KV18 CY7C1318KV18, CY7C1320KV18 18-Mbit DDR II SRAM Two-Word Burst Architecture 18-Mbit DDR II SRAM Two-Word Burst.

Key Features

Configurations CY7C1316KV18.
2 M × 8 CY7C1916KV18.
2 M × 9 CY7C1318KV18.
1 M × 18 CY7C1320KV18.
512 K × 36 18-Mbit density (2 M × 8, 2 M × 9, 1 M × 18, 512 K × 36) 333-MHz clock for high bandwidth Two-word burst for reducing address bus frequency Double data rate (DDR) interfaces  (data transferred at 666 MHz) at 333 MHz Two input clocks (K and K) for precise DDR timing.
SRAM uses rising edges only Two input clocks for out.

More Datasheets from Cypress (now Infineon)

Part Number	Description
CY7C1318AV18	18-Mbit DDR-II SRAM 2-Word Burst Architecture
CY7C1318BV18	18-Mbit DDR-II SRAM 2-Word Burst Architecture
CY7C1318CV18	(CY7C1xxxCV18) 18-Mbit DDR-II SRAM 2-Word Burst Architecture
CY7C1318JV18	18-Mbit DDR-II SRAM 2-Word Burst Architecture
CY7C131	1K x 8 Dual-Port Static RAM
CY7C1310BV18	1.8V Synchronous Pipelined SRAM
CY7C1311AV18	(CY7C131xAV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture
CY7C1311BV18	(CY7C1x1xBV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture
CY7C1311CV18	(CY7C1x1xCV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture
CY7C1311JV18	(CY7C1x1xJV18) 18-Mbit QDR II SRAM 4-Word Burst Architecture