CY7C1338B Overview
The CY7C1338B is a 3.3V, 128K by 32 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and increments the address automatically for the rest of the burst access.
CY7C1338B Key Features
- Supports 117-MHz microprocessor cache systems with zero wait states
- 128K by 32 mon I/O
- Fast clock-to-output times
- 7.5 ns (117-MHz version)
- Two-bit wraparound counter supporting either interleaved or linear burst sequence
- Separate processor and controller address strobes provide direct interface with the processor and external .. cache cont
- Synchronous self-timed write
- Asynchronous output enable
- 3.3V/ 2.5V I/Os
- JEDEC-standard pinout