CY7C1354CV25 Datasheet PDF - Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined SRAM Specs

CY7C1354CV25 - 9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Datasheet Summary

Features

Pin-compatible with and functionally equivalent to ZBT™.
Supports 250-MHz bus operations with zero wait states.
Available speed grades are 250, 200, and 166 MHz.
Internally self-timed output buffer control to eliminate the need to use asynchronous OE.
Fully registered (inputs and outputs) for pipelined operation.
Byte write capability.
Single 2.5 V power supply (VDD).
Fast clock-to-output times.
2.8 ns (for 250-MHz device).
Clock enable (CEN) pi.

Datasheet Details

Part number	CY7C1354CV25
Manufacturer	Cypress Semiconductor
File Size	1.32 MB
Description	9-Mbit (256K x 36/512K x 18) Pipelined SRAM
Datasheet	CY7C1354CV25 Datasheet
Additional preview pages of the CY7C1354CV25 datasheet.

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Full PDF Text Transcription

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CY7C1354CV25 CY7C1356CV25 9-Mbit (256K × 36/512K × 18) Pipelined SRAM with NoBL™ Architecture 9-Mbit (256K × 36/512K × 18) Pipelined SRAM with NoBL™ Architecture Features ■ Pin-compatible with and functionally equivalent to ZBT™ ■ Supports 250-MHz bus operations with zero wait states ■ Available speed grades are 250, 200, and 166 MHz ■ Internally self-timed output buffer control to eliminate the need to use asynchronous OE ■ Fully registered (inputs and outputs) for pipelined operation ■ Byte write capability ■ Single 2.5 V power supply (VDD) ■ Fast clock-to-output times ❐ 2.

Published: Mar 13, 2017 |