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CY7C1370DV25 Datasheet 18-mbit (512k X 36/1m X 18) Pipelined Sram

Manufacturer: Cypress (now Infineon)

Overview: CY7C1370DV25 CY7C1372DV25 18-Mbit (512K × 36/1M × 18) Pipelined SRAM with NoBL™ Architecture 18-Mbit (512K × 36/1M × 18) Pipelined SRAM with NoBL™.

Key Features

  • Pin-compatible and functionally equivalent to ZBT™.
  • Supports 200-MHz bus operations with zero wait states.
  • Available speed grades are 200 and 167 MHz.
  • Internally self-timed output buffer control to eliminate the need to use asynchronous OE.
  • Fully registered (inputs and outputs) for pipelined operation.
  • Byte write capability.
  • Single 2.5 V core power supply (VDD).
  • 2.5 V I/O power supply (VDDQ).
  • Fast clock-to-output times.
  • 3.0 ns (for 200-MHz devic.

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