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CY7C1394BV18 Datasheet 1.8v Synchronous Pipelined Sram

Manufacturer: Cypress (now Infineon)

Overview: CY7C1392BV18, CY7C1992BV18 CY7C1393BV18, CY7C1394BV18 18-Mbit DDR-II SIO SRAM 2-Word Burst.

This datasheet includes multiple variants, all published together in a single manufacturer document.

Key Features

  • 18-Mbit density (2M x 8, 2M x 9, 1M x 18, 512K x 36).
  • 300 MHz clock for high bandwidth.
  • 2-word burst for reducing address bus frequency.
  • Double Data Rate (DDR) interfaces (data transferred at 600 MHz) at 300 MHz.
  • Two input clocks (K and K) for precise DDR timing.
  • SRAM uses rising edges only.
  • Two input clocks for output data (C and C) to minimize clock skew and flight time mismatches.
  • Echo clocks (CQ and CQ) simplify data capture in high-speed systems.

More Datasheets from Cypress (now Infineon)

Part Number Description
CY7C139 4K x 8/9 Dual-Port Static RAM
CY7C1392BV18 1.8V Synchronous Pipelined SRAM
CY7C1392KV18 18-Mbit DDR II SIO SRAM Two-Word Burst Architecture
CY7C1393BV18 1.8V Synchronous Pipelined SRAM
CY7C1393KV18 18-Mbit DDR II SIO SRAM Two-Word Burst Architecture
CY7C1399 32K x 8 3.3V Static RAM
CY7C1399B 256K(32K x 8) Static RAM
CY7C1399BN 256-Kbit (32K x 8) Static RAM
CY7C139AV (CY7C006AV - CY7C145AV) Dual Port Static RAM
CY7C139V (CY7C006V - CY7C139V) Dual Port Static RAM

CY7C1394BV18 Distributor