CY7C144 Overview
The CY7C144 and CY7C145 are high-speed CMOS 8K x 8 and 8K x 9 dual-port static RAMs. Various arbitration schemes are included on the CY7C144/5 to handle situations when multiple processors access the same piece of data. Two ports are provided permitting independent, asynchronous access for reads and writes to any location in memory.
CY7C144 Key Features
- True Dual-Ported memory cells which allow simultaneous reads of the same memory location
- 8K x 8 organization (CY7C144)
- 8K x 9 organization (CY7C145)
- 0.65-micron CMOS for optimum speed/power
- High-speed access: 15ns
- Low operating power: ICC = 160 mA (max.)
- Fully asynchronous operation
- Automatic power-down
- TTL patible
- Master/Slave select pin allows bus width expansion to 16/18 bits or more