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CY7C1460AV33 Datasheet 36-mbit Pipelined Sram

Manufacturer: Cypress (now Infineon)

Overview: CY7C1460AV33 CY7C1462AV33 36-Mbit (1M × 36/2M × 18) Pipelined SRAM with NoBL™ Architecture 36-Mbit (1M × 36/2M × 18) Pipelined SRAM with NoBL™.

General Description

The CY7C1460AV33/CY7C1462AV33 are 3.3 V, 1M × 36/2M × 18 synchronous pipelined burst SRAMs with No Bus Latency™ (NoBL logic, respectively.

They are designed to support unlimited true back-to-back read/write operations with no wait states.

The CY7C1460AV33/CY7C1462AV33 are equipped with the advanced (NoBL) logic required to enable consecutive read/write operations with data being transferred on every clock cycle.

Key Features

  • Pin compatible and functionally equivalent to ZBT.
  • Supports 250 MHz bus operations with zero wait states.
  • Available speed grades are 250, 200 and 167 MHz.
  • Internally self timed output buffer control to eliminate the need to use asynchronous OE.
  • Fully registered (inputs and outputs) for pipelined operation.
  • Byte write capability.
  • 3.3 V power supply.
  • 3.3 V/2.5 V I/O power supply.
  • Fast clock-to-output times.
  • 2.6 ns (for 250 MHz device).
  • Clock.

More Datasheets from Cypress (now Infineon)

Part Number Description
CY7C1460AV25 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM
CY7C1460BV25 36-Mbit (1 M x 36/2 M x 18) Pipelined SRAM
CY7C1460KV25 36-Mbit (1M x 36/2M x 18) Pipelined SRAM
CY7C1460KV33 36-Mbit (1M x 36/2M x 18) Pipelined SRAM
CY7C1460KVE25 36-Mbit (1M x 36/2M x 18) Pipelined SRAM
CY7C1460KVE33 36-Mbit (1M x 36/2M x 18) Pipelined SRAM
CY7C146 2K x 8 Dual-Port Static RAM
CY7C1461AV25 Flow-Through SRAM
CY7C1461AV33 Flow-Through SRAM
CY7C1461KV33 36-Mbit (1M x 36/2M x 18) Flow-Through SRAM

CY7C1460AV33 Distributor