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CY7C149 - (CY7C148 / CY7C149) 1K x 4 Static RAM

Download the CY7C149 datasheet PDF. This datasheet also covers the CY7C148 variant, as both devices belong to the same (cy7c148 / cy7c149) 1k x 4 static ram family and are provided as variant models within a single manufacturer datasheet.

General Description

The CY7C148 and CY7C149 are high-performance CMOS static RAMs organized as 1024 by 4 bits.

2 A5 A6 V CC A7 INPUTBUFF

Key Features

  • Automatic power-down when deselected (7C148) CMOS for optimum speed/power 25-ns access time Low active power.
  • 440 mW (commercial) sion is provided by an active LOW chip select (CS) input and three-state outputs. The CY7C148 remains in a low-power mode as long as the device remains unselected; i. e. , (CS) is HIGH, thus reducing the average power requirements of the device. The chip select (CS) of the CY7C149 does not affect the power dissipation of.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CY7C148_CypressSemiconductor.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by Cypress (now Infineon)

Part Number Description
CY7C140 1K x 8 Dual-Port Static Ram
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
CY7C148 CY7C149 1Kx4 Static RAM Features • • • • Automatic power-down when deselected (7C148) CMOS for optimum speed/power 25-ns access time Low active power — 440 mW (commercial) sion is provided by an active LOW chip select (CS) input and three-state outputs. The CY7C148 remains in a low-power mode as long as the device remains unselected; i.e., (CS) is HIGH, thus reducing the average power requirements of the device. The chip select (CS) of the CY7C149 does not affect the power dissipation of the device. Writing to the device is accomplished when the chip select (CS) and write enable (WE) inputs are both LOW. Data on the I/O pins (I/O 0 through I/O 3) is written into the memory locations specified on the address pins (A 0 through A 9).