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CY7C68000 - TX2 USB 2.0 UTMI Transceiver

Datasheet Summary

Description

Normal operation Non-driving Disable Bit Stuffing and NRZI encoding Reserved TX2 has an on-chip oscillator circuit that uses an external 24MHz (±100-ppm) crystal with the following characteristics: Parallel resonant Fundamental mode 500-µW drive level 27

Features

  • The Cypress EZ-USB TX2 is a Universal Serial Bus (USB) specification revision 2.0 transceiver, serial/deserializer, to a parallel interface of either 16 bits at 30 MHz or eight bits at 60 MHz. The TX2 provides a high-speed physical layer interface that operates at the maximum allowable USB 2.0 bandwidth. This allows the system designer to keep the complex highspeed analog USB components external to the digital ASIC which decreases development time and associated risk. A standard interface is pr.

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Datasheet Details

Part number CY7C68000
Manufacturer Cypress Semiconductor
File Size 237.07 KB
Description TX2 USB 2.0 UTMI Transceiver
Datasheet download datasheet CY7C68000 Datasheet
Additional preview pages of the CY7C68000 datasheet.

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Full PDF Text Transcription

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PRELIMINARY CY7C68000 TX2™ USB 2.0 UTMI Transceiver 1.0 EZ-USB TX2 Features The Cypress EZ-USB TX2 is a Universal Serial Bus (USB) specification revision 2.0 transceiver, serial/deserializer, to a parallel interface of either 16 bits at 30 MHz or eight bits at 60 MHz. The TX2 provides a high-speed physical layer interface that operates at the maximum allowable USB 2.0 bandwidth. This allows the system designer to keep the complex highspeed analog USB components external to the digital ASIC which decreases development time and associated risk. A standard interface is provided that is USB 2.0-certified and is compliant with Transceiver Macrocell Interface (UTMI) specification version 1.05 dated 3/29/01. Two packages are defined for the family: 56-pin SSOP and 56pin QFN.
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