CY82C597 Datasheet | Cypress

PRELIMINARY CY82C597 386/486 Green Chip Set Features D 160ĆPin single chip PQFP D Supports PC/AT patible systems at 25/33/40/50 MHz D Supports AMD, Cyrix level 1 writeĆ back CPU D WriteĆBack/WriteĆThrough cache with 32KB/64KB/128KB/256KB/512KB/ 1MB cache size D NonĆcachable memory range support D Full VESA Local Bus support. No PAL needed for VESA master mode D BuiltĆin tag address parator for lower cost and performance enhancement D Page mode DRAM controller supports mixture of 256KB/512KB/1MB/2MB/ 4MB/16MB devices D Additional DRAM memory can be supported on the AT bus or VESA bus D Supports up to 128MB of DRAM on the motherboard D Shadow RAM support D Memory A,B,D, and E (256KB total) can be remapped to the top of the memory space D Deep Green support -hardware or software PowerĆdown mode D Unlimited system state: full speed, standĆby, suspend and any number of userĆdefined states D R Microsoft APM support D 11 event detectors and 5 userĆdefined timers D Standard AT refresh and hidden reĆ fresh support D Hardware/software TURBO speed control D Fast GATEA20, Fast Reset support D Supports modular design-one moĆ therboard for 386/486/486SX D Supports Intel/AMD/Cyrix 386DX D Supports Intel 486DX/DX2/DX4/SL/ SX/P24T, Cyrix Cx486, AMD Am486 CPUs System Block Diagram D[31:0] CNTL A[31:2] TAG SRAM DATA...