CY8C24223
Key Features
- Advanced Peripherals (PSoC Blocks) ❐ 6 Rail-to-Rail Analog PSoC Blocks Provide: - Up to 14-Bit ADCs - Up to 8-Bit DACs - Programmable Gain Amplifiers - Programmable Filters and Comparators ❐ 4 Digital PSoC Blocks Provide: - 8- to 32-Bit Timers, Counters, and PWMs - CRC and PRS Modules - Full-Duplex UART - Multiple SPI Masters or Slaves - Connectable to all GPIO Pins ❐ Complex Peripherals by Combining Blocks
- Precision, Programmable Clocking ❐ Internal ±2.5% 24/48 MHz Oscillator ❐ High-Accuracy 24 MHz with Optional 32 kHz Crystal and PLL ❐ Optional External Oscillator, up to 24 MHz ❐ Internal Oscillator for Watchdog and Sleep
- Flexible On-Chip Memory ❐ 4K Bytes Flash Program Storage 50,000 Erase/Write Cycles ❐ 256 Bytes SRAM Data Storage ❐ In-System Serial Programming (ISSP) ❐ Partial Flash Updates ❐ Flexible Protection Modes ❐ EEPROM Emulation in Flash
- Programmable Pin Configurations ❐ 25 mA Sink on all GPIO ❐ Pull up, Pull down, High Z, Strong, or Open Drain Drive Modes on all GPIO ❐ Up to 10 Analog Inputs on GPIO ❐ Two 30 mA Analog Outputs on GPIO ❐ Configurable Interrupt on all GPIO
- Additional System Resources ❐ I2C Slave, Master, and Multi-Master to 400 kHz ❐ Watchdog and Sleep Timers ❐ User-Configurable Low Voltage Detection ❐ Integrated Supervisory Circuit ❐ On-Chip Precision Voltage Reference
- Complete Development Tools ❐ Free Development Software (PSoC™ Designer) ❐ Full-Featured, In-Circuit Emulator and Programmer ❐ Full Speed Emulation ❐ Complex Breakpoint Structure ❐ 128K Bytes Trace Memory Port 2 Port 1 Port 0 Analog Drivers PSoC™ Functional Overview The PSoC™ family consists of many Mixed Signal Array with On-Chip Controller devices. These devices are designed to replace multiple traditional MCU-based system components with one, low cost single-chip programmable device. PSoC devices include configurable blocks of analog and digital logic, as well as programmable interconnects. This architecture allows the user to create customized peripheral configurations that match the requirements of each individual application. Additionally, a fast CPU, Flash program memory, SRAM data memory, and configurable IO are included in a range of convenient pinouts and packages. The PSoC architecture, as illustrated on the left, is comprised of four main areas: PSoC Core, Digital System, Analog System, and System Resources. Configurable global busing allows all the device resources to be combined into a complete custom system. The PSoC CY8C24x23 family can have up to three IO ports that connect to the global digital and analog interconnects, providing access to 4 digital blocks and 6 analog blocks. PSoC CORE System Bus Global Digital Interconnect SRAM 256 Bytes Interrupt Controller Global Analog Interconnect Flash 4K Sleep and Watchdog SROM CPU Core (M8C) Multiple Clock Sources (Includes IMO, ILO, PLL, and ECO)
