CY8C4125AZI-483 Datasheet | Cypress

PSo C® 4: PSo C 4100 Family Datasheet Programmable System-on-Chip (PSo C®) General Description PSo C® 4 is a scalable and reconfigurable platform architecture for a family of mixed-signal programmable embedded system controllers with an ARM® Cortex™-M0 CPU. It bines programmable and re-configurable analog and digital blocks with flexible automatic routing. The PSo C 4100 product family, based on this platform, is a bination of a microcontroller with digital programmable logic, high-performance analog-to-digital conversion, opamps with parator mode, and standard munication and timing peripherals. The PSo C 4100 products will be fully upward patible with members of the PSo C 4 platform for new applications and design needs. The programmable analog and digital sub-systems allow flexibility and in-field tuning of the design. Features 32-bit MCU Sub-system - 24-MHz ARM Cortex-M0 CPU with single-cycle multiply - Up to 32 k B of flash with Read Accelerator - Up to 4 k B of SRAM Programmable Analog - Two opamps with reconfigurable high-drive external and high-bandwidth internal drive and parator modes and ADC input buffering capability - 12-bit 806 Ksps SAR ADC with differential and single-ended modes and Channel Sequencer with signal averaging - Two current DACs (IDACs) for general-purpose or capacitive sensing applications on any pin - Two low-power parators that operate in Deep Sleep Low Power 1.71-V to 5.5-V operation - 20-n A Stop Mode with GPIO pin wakeup - Hibernate and Deep Sleep modes allow wakeup-time versus power trade-offs Capacitive Sensing - Cypress Cap Sense Sigma-Delta (CSD) provides best-in-class SNR (>5:1) and water tolerance - Cypress supplied software ponent makes capacitive sensing design easy - Automatic hardware tuning (Smart Sense™) Segment LCD Drive - LCD drive supported on all pins (mon or segment) - Operates in Deep Sleep mode with 4 bits per pin memory Serial munication - Two independent run-time reconfigurable serial...