CY8CPLC20 Datasheet | Cypress

CY8CPLC20 Datasheet Powerline munication Solution owerline munication Solution Features - Powerline munication solution - Integrated powerline modem PHY - Frequency shift keying modulation - Configurable baud rates up to 2400 bps - Powerline optimized network protocol - Integrates data link, transport, and network layers - Supports bidirectional half duplex munication - 8-bit CRC error detection to minimize data loss - I2C enabled powerline application layer - Supports I2C frequencies of 50, 100, and 400 k Hz - Reference designs for 110 V/240 V AC and 12 V/24 V AC/DC Powerlines - Reference designs ply with CENELEC EN 50065-1:2001 and FCC Part 15 - Powerful Harvard-architecture Processor - M8C processor speeds to 24 MHz - Two 8x8 multiply, 32-bit accumulate - Programmable system resources (PSo C® Blocks) - 12 Rail-to-Rail Analog PSo C Blocks provide: - Up to 14-bit ADCs - Up to 9-bit DACs - Programmable gain amplifiers - Programmable filters and parators - 16 Digital PSo C Blocks provide: - 8 to 32-bit Timers, Counters, and PWMs - CRC and PRS Modules Logic Block Diagram - Up to four full duplex UARTs - Multiple SPI™ masters or...